The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 1997
Filed:
May. 03, 1995
Brian A Childers, Santa Clara, CA (US);
Eric A Baden, Saratoga, CA (US);
Apple Computer, Inc., Cupertino, CA (US);
Abstract
A system has a system resource, such as a frame buffer, coupled to a system bus, the system bus conveying a request for access to the system resource from another system element connected to the system bus. An apparatus for presenting the access request to the system resource from the system bus includes a queue, a multiplexor that is preferably glitchless, and a controller. The queue has an input for receiving access request information from the system bus; one or more storage elements, each for storing access request information, wherein the one or more storage means are connected to form a queue having a head and a tail; and a queue output for supplying data stored in the head of the queue. The multiplexor has a first input coupled to the queue output, a second input for receiving the access request information from the system bus, and a multiplexor output for supplying the access request to the system resource. The controller is coupled to the queue and to the multiplexor, for initiating the loading of the access request information into the queue, and for initially causing the multiplexor to supply, at the multiplexor output, the access request information from the second input, and for subsequently causing, after the access request information becomes available at the queue output, the multiplexor to supply, at the multiplexor output, the access request information from the first input. This configuration reduces latency on read operations to the frame buffer.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile