The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 1997
Filed:
Jan. 27, 1995
Hiroshi Takeno, Kyoto, JP;
Eiji Miyagoshi, Osaka, JP;
Hiroshi Imanishi, Takatsuki, JP;
Shintarou Nakatani, Osaka, JP;
Toshihide Akiyama, Takatsuki, JP;
Matsushita Electric Industrial Co., Ltd., Kadoma, JP;
Abstract
A variable-length-code decoder of this invention decodes an input bit stream including an input bit string having a codeword of a fixed-length code and a plurality of codewords of variable-length codes combined in a predetermined format. The decoder includes: a shifter for shifting the input bit string by a desired number of bits; a pattern detector for detecting a specific pattern in the bit string, and outputting a detection signal; two code tables provided for the respective variable-length codes, each code table having the length of each codeword (codeword length) and the decoded-word corresponding to the codeword, and outputting a codeword length and a decoded-word of a corresponding codeword based on the bit string output from the shifter; a processor for storing the format of the input bit string, outputting the length of the fixed-length code and decoded data of the fixed-length code, and selecting, for each of the variable-length codewords, one of the code tables to which the variable-length codeword belongs, based on the detection signal and the format; a codelength selector for selecting the codeword length or the fixed-length code, and for setting the shift amount for the input bit string in the shifter; and an output circuit for selectively outputting the decoded-word or the decoded data.