The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 1997
Filed:
Feb. 03, 1995
Roger W Ady, Lisle, IL (US);
Charles D Hood, III, Elmhurst, IL (US);
William R Groves, Naperville, IL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
The apparatus permits non-disruptive addition and removal of PCMCIA modules from a host device. The host device includes a signal bus connected to mating pins of the card header. The card header has a three-sided frame into which a module is inserted. A switch disposed on an edge of the header is responsive to insertion and de-insertion of the module. The length of the mating pins vary where selected mating pins of the card header have a first length for detecting substantially complete insertion and partial de-insertion of the module, and pins of a second length for applying bus signals to the module. Pins of a third length facilitate applying electrical power to the module. The computer is responsive to the switch and the mating pins such that the signal bus is deactivated to prevent corruption of the bus signals when the switch detects insertion of the module. The signal bus remains deactivated until the module is in communication with pins of a first length, whereupon the signal bus is then reactivated. This prevents electrical transients from reaching the bus. Additionally, the signal bus is deactivated upon partial de-insertion of the module when the module is no longer in communication with pins of first length. The signal bus remains deactivated until the switch detects complete de-insertion of the module, whereupon the signal bus is then reactivated.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile