System management mode and in-circuit emulation memory mapping and

Abstract

A computer system is provided that includes an interrupt driven system management mode during which system management code is accessed. In one embodiment, a lock-out register is provided to prevent accesses to the system management code while the computer system is operating in its normal mode. In one embodiment, an interrupt control unit is coupled to the ICE interrupt line of the microprocessor core, and controls a memory control unit in accordance with assertions of an external 'debug' interrupt signal and an external SMM (system management mode) interrupt signal. If the debug interrupt signal is asserted while the microprocessor core is operating in its normal mode, the interrupt control unit responsively asserts the ICE interrupt signal to the microprocessor core, thereby, causing the microprocessor core to execute ICE code. If, however, the SMM interrupt signal is asserted while the microprocessor core is operating in its normal mode, the interrupt control unit responsively asserts an ICE interrupt signal which causes the microprocessor core to commence executing the SMM code. Both the SMM code and ICE code may be mapped within a region of system memory which is common to the mapping of a video controller.