The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 1997
Filed:
Aug. 30, 1995
Applicant:
Inventor:
Matthew H Childs, Arlington, TX (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 46 ; 326 37 ; 326 93 ; 365219 ;
Abstract
An iterative logic circuit for iteratively performing a logic function includes a two-input logic gate and a D-type flip-flop. The flip-flop receives and time-delays the output signal from the logic gate to provide a feedback signal as one of the input signals to the logic gate. By sequentially processing the feedback signal together with a serial input data signal, the logic gate iteratively performs an associative logic function (e.g. EXCLUSIVE-OR) upon the serial input data signal, thereby performing a parallel logic function by executing a serial logic operation.