The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 1997

Filed:

May. 03, 1994
Applicant:
Inventor:

Naohito Kato, Kariya, JP;

Assignee:

Niipondenso Co., Ltd., Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257339 ; 257328 ; 257341 ; 257342 ;
Abstract

This invention aims at suppressing a parasitic transistor operation of a vertical MOS device at the time of application of a noise current and improving the limitations of withstanding against destruction of the device. P base layers 3 constituting each unit cell of an n-channel DMOS device are partially connected by p extraction regions between the unit cells so as to short-circuit the p base layers to source electrodes 9 in regions Z2 through the extraction regions. Accordingly, an applied noise branches to a conventional path extending from a region Z1 to the source electrodes 9 through an n source layer 5 and a path extending from +regions Z2 to the source electrodes 9 through the p extraction regions 4. Since the p regions form one continuous region throughout the device as a whole, a local potential rise of the p base layer can be limited. Accordingly, the parasitic transistor operation can be suppressed and a breakdown voltage of the device can be improved.


Find Patent Forward Citations

Loading…