The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 1997
Filed:
Oct. 11, 1995
Shiping Li, Canton, MA (US);
James A Pasco-Anderson, Needham, MA (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A parallel CRC remainder coefficient generator (100) and method (1100) are described for providing efficient error detection in a digital data communication system. This method calculates a K-bit CRC remainder m data bits at a time, where m can be less than, equal to, or greater than K, and where the processing of each of the m bits requires a total of j, K-bit table look-ups into a total of j tables of 2.sup.b entries each, where m=jb. It also requires one m-bit exclusive-or operation, a total of (j-1) K-bit exclusive-or operations, and one (K-m)-bit exclusive-or operation if m<K. An implementation of a 16-bit CRC using the new method (700) in a 16-bit DSP processor with m=16, j=2 and b=8 reduces processor loading by 43% relative to the fastest prior art method which uses m=8, j=1, and b=8. An implementation of a 32-bit CRC using the novel method (600) in a 16-bit DSP processor with m=6, j=2, and b=8 reduces the processor loading by 41% relative to the fastest prior art method which uses m=8, j=1, and b=8. Hardware implementation of the new method provides similar benefits with respect to throughput and area.