The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 1997
Filed:
Jul. 24, 1995
Jeffrey E Maguire, Austin, TX (US);
Motorola, Schaumburg, IL (US);
Abstract
A low power circuit (10) for translating logical addresses or input data to corresponding physical addresses or output data respectively. The circuit (10) includes an input latch (12), content addressable memory (CAM) (14), random access memory (RAM) (16), output latch (18), and comparator (20). The input latch (12) receives the logical address (22) and stores the logical address for at least one comparison cycle. The CAM (14) receives the logical address (22) and produces a corresponding match signal. The RAM (16) receives the corresponding match signal and produces the corresponding physical address (28). The output latch (18) receives the corresponding physical address (28) and stores the value for at least one clock cycle. The comparator (20) enables the CAM (14) and/or the RAM (16) operation only when the previous logical address does not match the current logical address (22). The corresponding physical address (28) remains in the output latch (18) until such time as a new logical address (22) or input data is provided to the low power circuit (10).