The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 1997

Filed:

Nov. 28, 1994
Applicant:
Inventors:

Toshimitsu Ishikawa, Kawaguchi, JP;

Atsushi Kitamura, Tokyo, JP;

Kenji Hirayama, Ooita, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257777 ; 257686 ; 257685 ;
Abstract

A method of mounting semiconductor integrated circuit devices comprising steps of forming a semiconductor device block having a plurality of semiconductor integrated circuit devices of vertical mounting type coupled to each other in parallel, and mounting the semiconductor device block on a printed board. A block of semiconductor integrated circuit devices comprising a plurality of semiconductor integrated circuit devices of vertical mounting type, and coupling means for coupling the plurality of semiconductor integrated circuit devices each other in parallel.


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