The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 1997
Filed:
May. 09, 1995
Applicant:
Inventor:
Toru Machida, Chiba, JP;
Assignee:
Seiko Instruments Inc., , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523008 ; 36518904 ; 365201 ;
Abstract
It is an object of the invention to provide a semiconductor memory integrated circuit wherein the sate of all of the memory cells in the memory array can be checked by measuring only one data output terminal. A means for interconnecting read signal buses is provided to connect the read signal buses to each other. A multiplicity of IC chips can be simultaneously measured and inspected even if the numbers of the drivers, comparators and DC measuring units, and the like available in the inspection apparatus used are limited.
Quick Actions:
Machida, Toru. (1997). Semiconductor memory integrated circuit (U.S. Patent No. 5615166). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5615166
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