Mos-controlled high-power thyristor

Abstract

This thyristor comprises a main current-carrying portion in the form of a semiconductor body having four layers, with contiguous layers being of different P and N conductivity types and with three back-to-back PN junctions between contiguous layers. One end layer constitutes an anode layer, an opposite end layer constitutes a cathode layer, and an intermediate layer contiguous with the cathode layer constitutes a gate layer. The cathode layer is divided into many elongated fingers, thereby dividing the PN junction between the cathode layer and the gate layer into many discrete PN subjunctions between the fingers and the gate layer. These subjunctions are effectively in parallel with each other so as to share the main current through the thyristor when the thyristor is 'on'. The gate layer has predetermined surface regions adjacent the cathode layer that are uncovered by the cathode-layer fingers and that respectively surround the PN subjunctions between the fingers and the gate layer. A gate electrode in ohmic contact with the gate layer in said predetermined surface regions of the gate layer surrounds the PN subjunctions between said fingers and said gate layer. The main current-carrying portion further comprises a cathode electrode having portions respectively registering with and in ohmic contact with the cathode-layer fingers.