The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 1997

Filed:

Jun. 01, 1995
Applicant:
Inventor:

Hidechika Kishigami, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395306 ; 395309 ; 395800 ; 364D / ;
Abstract

A microprocessor having a data-width change function has a core section in the microprocessor for fetching an instruction from the external memories in instruction fetch request, transferring data between the external memories and the microprocessor in data access request, and executing the instruction fetched and processing operand access operation, internal buses connected to the core section for transferring data to the core section, a memory for storing first bus indication data and second bus-width indication data indicating a bus-width of specified external buses, a bus-width change circuit connected to the internal buses and the external buses for changing specified external buses in the external buses to connect specified buses in the internal buses to be used during the instruction fetch bus cycle and the data access bus cycle, and a bus-width change controller connected to the bus change circuit and the memory for changing the bus-width of the buses in the external data buses based on the first bus-width indication data stored in the memory at the instruction fetch operation, and the second bus-width indication data stored in the memory, in order to transfer data with specified bus-width of the external data buses.


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