The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 1997
Filed:
Jan. 18, 1995
N Deepak Swamy, Austin, TX (US);
Tom J Kocis, Austin, TX (US);
Dell USA, LP, Austin, TX (US);
Abstract
An interconnect system is provided in which one or more laminated modules embodying electrical devices can be stacked in a three dimensional configuration upon a printed circuit board. One or more electrical devices is surface mounted to a recessed area at the upper surface of each laminated module, and each laminated module includes male pins and female sockets. The male pins can be releasibly engaged within sockets upon a printed circuit board. Additionally, the male pins of one laminated module can be engaged within female sockets of another laminated module in building-block fashion. Conductive paths are formed entirely through the laminated module between respective sockets and pins. The conductive paths are arranged in a less dense fashion than bond locations adjacent each electrical device. The bond locations are therefore offset from conductive paths to provide fan-out and redistribution features.