The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 1997
Filed:
Dec. 19, 1994
Vlad Bril, Campbell, CA (US);
Alexander Eglit, San Carlos, CA (US);
Sagar W Kenkare, Fremont, CA (US);
Cirrus Logic, Inc., Fremont, CA (US);
Abstract
A memory controller, particularly for use in a video controller, is provided which reduces the effect of page misses during memory access. A video port FIFO is provided for buffering data from a video port to a display memory. A CRT FIFO is provided for buffering data from a display memory to a display. If, during a video port FIFO cycle, a page miss is encountered, the video port FIFO cycle is terminated and processing passes to a CRT FIFO CYCLE. If a page miss is encountered during a CRT FIFO cycle, the subsequent video port FIFO cycle will shortened by a number of memory cycles to compensate for the additional memory cycles required by the page miss. Additional data accumulated in the video port FIFO may be transferred to the display memory during a retrace interval. In this manner, memory bandwidth is optimized by removing a non-aligned page miss as the worst case of memory bandwidth utilization.