The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 1997

Filed:

Jul. 21, 1995
Applicant:
Inventors:

Akiyoshi Asai, Aichi-gun, JP;

Kazuhiro Tsuruta, Toyoake, JP;

Takeshi Enya, Nagoya, JP;

Assignee:

Nippondenso Co., Ltd., Kariya, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257360 ; 257355 ;
Abstract

A protective circuit that can maintain effectiveness when excess voltages of both polarities are applied is placed between the input terminal of an internal CMOS inverter and an input pad. The protective circuit includes a protective resistor, a P-channel MOSFET and an N-channel MOSFET. The N-channel MOSFET is placed between a connecting line and a ground terminal with the gate terminal of the MOSFET connected to the connecting line. The P-channel MOSFET is placed between the connecting line and the ground terminal with the gate terminal of the MOSFET connected to the connecting line. The P-channel MOSFET releases excess negative voltage from the outside using ON-state current and the N-channel MOSFET releases excess positive voltage from the outside using ON-state current.


Find Patent Forward Citations

Loading…