The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 1997

Filed:

Dec. 16, 1994
Applicant:
Inventors:

Manfred Vogel, Ditzingen-Heimberdingen, DE;

Werner Herden, Gerlingen, DE;

Jiri Marek, Reutlingen, DE;

Kurt Weiblen, Metzingen, DE;

Assignee:

Robert Bosch GmbH, Stuttgart, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01M / ;
U.S. Cl.
CPC ...
73115 ;
Abstract

The pressure sensor for a combustion chamber includes a housing; a membrane closing the housing on its combustion chamber side; a monocrystalline silicon chip inside the housing and including a sensor circuit device provided with a bridge circuit device including a piezoresistor producing an electrical signal in response to applied pressure and a plunger positioned between the membrane and the silicon chip to transmit a pressure in the combustion chamber to the piezoresistor. The bridge circuit device is connected to an amplifier circuit located on the silicon chip. The amplifier circuit includes amplifier resistors having resistance values determinative of the offset of the signal and sensor sensitivity. A network circuit for offset and sensitivity adjustments is provided on the silicon chip and includes four adjusting circuits for offset, sensor sensitivity, temperature compensation of offset and for temperature compensation of sensor sensitivity. Each adjusting circuit includes parallel-connected adjusting circuit branches each including an adjusting resistor and a semiconductor element in series. The adjusting circuit branches of respective adjusting circuits are connected in parallel with respective amplifier resistors. A logic circuit also provided on the silicon chip is used to make predetermined semiconductor elements electrically conductive so that predetermined adjusting circuit branches can be made conductive with a resistance determined by the adjusting resistors in the predetermined adjusting circuit branches to make the respective adjustments.


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