Vector processor having a mask register used for performing nested

Abstract

In a computer equipped with a mask register in which is stored mask data indicating, for each array element, whether or not a statement such as an IF statement or an ELSE statement should be applied, the computer having a vector processor executing vector operation processing according to the mask data stored in the mask register, a first executing unit acquires first and second memory areas in which the mask data is saved in a stack formation. A second executing unit generates, when an IF statement appears in execution of a program, mask data indicating truth/falsity of a conditional expression of the IF statement, and saves the mask data indicating the truth/falsity of the conditional expression in the first memory area. A third executing unit reads latest mask data saved in the second memory area in synchronism with a process of the second executing unit. A fourth executing unit performs a bit-base logic operation on the mask data saved by the second executing unit and the mask data read by the third executing unit, stores mask data thus generated and applied to the IF statement in the mask register, and saves the above mask data applied to the above IF statement in the second memory area.