The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 1997

Filed:

Jan. 22, 1996
Applicant:
Inventors:

John G Mark, Pasadena, CA (US);

Daniel P McLane, Bell Canyon, CA (US);

Daniel A Tazartes, West Hills, CA (US);

Stanley F Wyse, Encino, CA (US);

Assignee:

Litton Systems, Inc., Beverly Hills, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01P / ;
U.S. Cl.
CPC ...
73488 ; 73491 ; 7351401 ; 7351417 ; 364566 ;
Abstract

A digital circuit for adapting the output of a closed-loop accelerometer to a utilization circuit where the cycle time of the rebalance loop of the accelerometer is unrelated to the cycle time of the utilization circuit. A register receives and stores a digital value representative of measured acceleration and a bank of serially-arranged divide-by-two counters accepts the output of the rebalance loop clock. A gate arrangement makes one-by-one correlations between the states of the register and the outputs of the divide-by-two counters. A trigger circuit receives the gate outputs, providing a pulse when triggered by a downgoing edge of a square wave output of the gate array. A counter receives the pulse stream and is gated, in turn, in accordance with the cycle time of the utilization circuit so that the accelerometer data employed therein is representative of the portion of the acceleration occurring during a cycle of the utilization circuit.


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