The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 1997

Filed:

Oct. 14, 1994
Applicant:
Inventors:

Peruvemba S Balasubramanian, Chappaqua, NY (US);

Nathan J Lee, New City, NY (US);

Scott D Lekuch, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B / ;
U.S. Cl.
CPC ...
375242 ; 375292 ; 375342 ; 341 58 ; 341 69 ; 341 70 ;
Abstract

A modulation scheme and system, compatible with both the asynchronous IRDA mode and the synchronous mode of IR communication, involves Non-Return-to-Zero-Inverted (NRZI) and Flash pulse encoding in conjunction with zero-bit stuffing. A digital data stream has a zero-bit inserted therein, before NRZI format encoding, whenever five consecutive one's are detected in the stream to enable the controller to distinguish the data from flags, which are exempt from the zero-bit insertion, and to provide enough transitions in the data so that the demodulator's digital phase lock loop can stay locked independent of the data contents. A Flash pulse (of from 3/16 to 8/16 of bit cell width, depending on the data rate) is generated whenever a transition is detected in the NRZI formatted data. The result, in keeping with IRDA modulation, is that a Flash pulse is generated whenever a zero occurs in the data stream. On the demodulation side, whenever a Flash pulse is received, the level of the receive line is toggled resulting in an output in NRZI format. Using this modulation scheme with a serial controller which supports NRZI and bit-stuffing, a system may be constructed that uses the controller's phase lock loop to send and receive data synchronously.


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