The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 1997

Filed:

Feb. 27, 1995
Applicant:
Inventors:

Thomas F Uhling, Monument, CO (US);

Philip J Yearsley, Colorado Springs, CO (US);

Dale L Pittock, Colorado Springs, CO (US);

Mark E Mathews, Colorado Springs, CO (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324601 ; 324130 ;
Abstract

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1.4 .mu.sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1.4 .mu.sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.


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