The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 1997
Filed:
Aug. 21, 1995
Masatomi Okabe, Itami, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
It is an object of the present invention to design in a short period of time a semiconductor integrated circuit device capable of stable operation with high noise margin by reducing effects of noise caused by coupling capacitance between clock signal lines and other signal lines in a semiconductor integrated circuit device with a finer structure. A macro-cell (1a) used in designing with a Computer Aided Design system has a structure in which a clock signal line (6) is interposed and shielded between V.sub.DD power-supply lines (4 and 4a). By using such a basic macro-cell (1a) with the shielded clock signal line (6), coupling capacitance can always be reduced between the clock signal lines and other signal lines formed in interconnection spaces even when using the Computer Aided Design.