The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 1997
Filed:
Dec. 20, 1994
Tomohiro Nakayama, Kawasaki, JP;
Yutaka Fukutani, Kawasaki, JP;
Takanori Shiga, Kawasaki, JP;
Masakazu Kimura, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
An object of the present invention is to improve the output speed of a data signal output circuit having a latch circuit when the supply voltage is low. The data signal output circuit according to the present invention includes a latch circuit; an output circuit; a latch control circuit; an output control circuit; and a supply voltage decrease detection circuit. The latch circuit latches and holds a data signal according to a latch signal output from the latch control circuit. By setting the latch signal to one of two logical states, the latch circuit changes to a through state directly outputting an input data signal. The output circuit changes between a state for outputting a data signal from the latch circuit and a high-impedance state according to an output control signal output from the output control circuit. The supply voltage decrease detection circuit detects whether or not the supply voltage is less than a pre-determined value. When the supply voltage decrease detection circuit detects that the supply voltage is less than the pre-determined value the latch control circuit outputs a latch signal to set the latch circuit to the through state and the output control circuit outputs an output control signal to set the output circuit to output the data signal from the latch circuit.