The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 1997
Filed:
Aug. 08, 1994
Wan L Leung, Coral Springs, FL (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
In a computer system having a central processing unit (CPU) in circuit communication with a memory via a memory bus and having first and second peripheral bus controllers generating first and second dissimilar peripheral buses, a multibus arbiter is provided for arbitrating access of a memory bus between the two dissimilar buses. The multibus arbiter has an assignment register, a time slot pointer, and an arbitration circuit. The length of the assignment register and time slot pointer controls the granularity of control of accesses to the memory bus by the peripheral buses. The assignment register holds a multibit assignment value that determines which of the two peripheral buses will be given access to the memory bus for a given time slot during contention. The time slot pointer selects one of the bits of the assignment register and points to a different bit responsive to both peripheral buses requesting access to the memory bus at the same time and one of said peripheral bus arbiters indicating that the current access of the memory bus is complete.