The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 1997
Filed:
Oct. 25, 1994
Richard L Groover, Santa Clara, CA (US);
William K Shu, Sunnyvale, CA (US);
Sang S Lee, Sunnyvale, CA (US);
George Fujimoto, Santa Clara, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
An integrated-circuit package assembly includes a separate silicon substrate to which an integrated-circuit die is fixed. The separate silicon substrate serves as a heat spreader for the integrated-circuit die. The separate silicon substrate to which the integrated-circuit die is fixed is packaged in either a molded package body or a cavity-type package body. For the molded package body, the package body is molded around a leadframe, the integrated-circuit die, and the separate silicon substrate to which the integrated-circuit die is fixed. For a molded package body, the leadframe has bonding fingers formed at the inward ends thereof which are attached to the separate silicon substrate or the lead frame may have a die-attach pad to which is fixed the separate silicon substrate. For the cavity-type package, the package body includes a mounting surface formed adjacent to a cavity formed therein and the mounting surface has the separate silicon substrate fixed to the top surface thereof. The cavity-type body is formed of a ceramic material or as a multi-layer printed-circuit board. One or more interposer areas are formed on the top surface of the silicon substrate for attachment of connection wires from the integrated-circuit die or the leadframe. A portion of the interposer can extend between the integrated circuit die and the top surface of the silicon substrate to accommodate integrated-circuit dies of various sizes. The interposer includes a layer of oxide formed on the surface of the silicon substrate, which layer of oxide is covered with a layer of conductive material.