The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 1997
Filed:
Mar. 31, 1995
Benjamin C Diem, Sherman, TX (US);
M Dwayne Ward, Garland, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A FIFO memory (4) provides serial to parallel and parallel to serial data conversion. A read frame buffer (40) and a write frame buffer (30) are coupled with a RAM array (22). Serial input data is stored temporarily into the write frame (30) of fixed width, n bits wide. Then, the entire n bit wide frame of stored serial input data is written into RAM array (22) at once in parallel. Data read in parallel from RAM array (22) is stored temporarily into the read frame (40) and thereafter provided serially to the FIFO output (53). By converting serial input to parallel input, overall chip size is reduced by reducing the number of pointers required because it is not necessary to address the RAM (22) individually when serially writing data into it. The read frame (40) coupled to the write frame (30) and to the serial input data. This allows data written into the FIFO to be immediately available and allows the read frame (40) to receive backfilled data from the write frame (30).