The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 1997

Filed:

Jun. 07, 1994
Applicant:
Inventors:

James M Harris, Terrell, TX (US);

Brigitte U Kiba, Plano, TX (US);

Porter B Click, Jr, Garland, TX (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
174 524 ; 257664 ; 257704 ; 257728 ;
Abstract

A package for a semiconductor die, particularly field effect transistors, operating at very high frequencies includes a base having integrally formed conductor supports. The base and the supports are formed from a thermo-formed or thermo-set plastic material. Metal conductors are plated to the supports and terminate in pads for connecting the die to an external circuit. A die is attached to the base and wires bonded to the package conductor pads. The surface of the die, the bond wires and the surface of the package conductors are substantially coplanar to reduce abrupt changes in the path of signal flow which reduces radiation losses. Package dimensions and conductor proximities and bond wire lengths are precisely located and enhanced to reduce parasitic inductances. When connected to an external circuit, the package is flipped and its lid inserted into a hole in the circuit board. The package conductors rest against the circuit board to the semiconductor device. The manufacture and assembly of the package is reliable and suited to commercial applications.


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