The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Apr. 06, 1994
Applicant:
Inventors:

Marco Casis, Varese, IT;

Giorgio Pedrazzini, Pavia, IT;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395309 ; 395556 ;
Abstract

While employing the same number of dedicated pins of an IC, a self-configurable interface circuit between a control bus and the IC recognizes whether the IC is being used in a system employing an SPI or a I2CBUS protocol for the transmission to the IC of control signals through the bus. The interface circuit employs an 'inner' SPI interface standard block, to a third input of which either a true CE (chip-enable) signal coming from a third wire of the bus or a virtual CE signal that is self-generated by the interface circuit in case of operation in an I2CBUS environment, is fed. The third (ADDR) pin of the IC may be connected to the CE wire of the bus in case of an SPI application or it may be biased at the supply or ground voltage for selecting one or the other of two internal addresses of the IC, when functioning in an I2CBUS environment.


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