The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Oct. 30, 1995
Applicant:
Inventor:

Masayoshi Hirata, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365226 ; 36518529 ; 36518522 ; 36518907 ; 365218 ;
Abstract

In a semiconductor memory device 100 including a power supply voltage decision circuit 101 for detecting whether or not the power supply voltage is higher than a predetermined level to produce an output signal LVD, an oscillator 102 which produces an oscillated signal .phi. as an output signal, an intended counter value altering circuit 103, and a binary counter circuit 104, a writing or erasing time interval is elongated by the output signal LVD, when the power supply voltage becomes lower than the predetermined level.


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Hirata, Masayoshi. (1997). Compact semiconductor memory device capable of preventing incomplete (U.S. Patent No. 5592429). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5592429

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