The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Apr. 10, 1995
Applicant:
Inventors:

Donald J Verhaeghe, Colorado Springs, CO (US);

Steven D Traynor, Colorado Springs, CO (US);

Assignee:

Ramtron International Corporation, Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365145 ; 36518901 ;
Abstract

A circuit and method for reducing compensation of a ferroelectric capacitor in a cell of a memory array allows the capacitor's hysteresis loop to be repositioned toward its uncompensated position by pulsing the electrodes of the memory cell capacitors, via the memory array plate line, one or more additional times whenever a 'write' occurs to the memory array. As a result, the ferroelectric capacitor delivers a signal of greater strength to the memory device sense amps upon a subsequent 'read' operation significantly enhancing overall reliability and yield yet without reducing overall device endurance.


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