The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Jun. 24, 1994
Applicant:
Inventors:

Stefan Hilbert, Zeuthen, DE;

Bernd Kirchner, Berlin, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341120 ; 341122 ; 341118 ;
Abstract

A circuit arrangement for signal processing of discrete or continuous signals of at least one CCD component, includes a multiplexer which receives the signals for processing and has an output, a pre-amplifier having an input connected to the output of the multiplexer, and further having an output. Two sample and hold circuits are provided that each have an input connected to the output of the pre-amplifier, each of the sample and hold circuits further having an output. An operational amplifier is provided having a non-inverting input connected to the output of a first of the sample and hold circuits, and an inverting input connected to the output of a second of the sample and hold circuits, the operational amplifier further has an output. A digital-analog converter having an output connected to the non-inverting input of the operational amplifier and puts out a correction signal. A multiplying digital-analog converter is provided having a reference input connected to the output of the operational amplifier, the multiplying digital-analog converter further having an output. A third sample and hold circuit has an input connected to the output of the multiplying digital-analog converter, the third sample and hold circuit further having an output. A buffer has an input connected to the output of the third sample and hold circuit, and further has an output connected to the input of an analog-digital converter.


Find Patent Forward Citations

Loading…