The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Jun. 22, 1995
Applicant:
Inventors:

Rafael Fried, Caesarea, IL;

Eyal Rozin, Ramat-Gan, IL;

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B / ; H03L / ;
U.S. Cl.
CPC ...
331111 ; 331 / ; 331 16 ; 331 25 ; 331 34 ; 331143 ; 331179 ; 327 42 ; 327 43 ; 327107 ; 327155 ; 327160 ; 455260 ;
Abstract

A frequency multiplier circuit generates an supplemental high-frequency timing signal from a single, low-frequency current-controlled oscillator (CCO). The current-controlled oscillator (CCO) generates a controlled discharge current and a controlled bias current which are controlled in parallel to substantially eliminate inaccuracies in a characteristic frequency-current curve of the current-controlled oscillator. The frequency multiplier circuit generates a high-frequency timing signal using the digitally-controlled CCO and avoids the usage of a phase-locked loop (PLL) technique. Specifically, a frequency multiplier includes a current-controlled oscillator having a plurality of input lines connected to receive a digital current select signal and having an output terminal connected to carry a timing signal at a current-controlled oscillator frequency f.sub.CCO set in accordance with the current select signal. The frequency multiplier further includes a control circuit having a first timing input terminal connected to the current-controlled oscillator output terminal to receive the current-controlled oscillator frequency f.sub.CCO, output lines connected to the current-controlled oscillator digital current select input lines, a second timing input terminal connected to receive a timing signal at a reference frequency f.sub.REF, and a plurality of input lines connected to receive a programmable frequency multiplication factor.


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