The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 1997
Filed:
Feb. 13, 1995
Michael E Runas, McKinney, TX (US);
Kirit B Patel, Dallas, TX (US);
Cirrus Logic, Inc., Fremont, CA (US);
Abstract
Systems and methods for testing ASIC and RAM memory devices are disclosed. The method comprises determining a signature map of valid power supply current values for a known good microcircuit wherein each valid power supply current value is measured at a fixed level of power supply voltage and corresponds to a unique test input stimuli pattern applied to the known good microcircuit. The signature map of power supply current values is stored in an electronic memory (300). The test input stimuli patterns are then applied to an unproven microcircuit (330) and the power supply current of the unproven microcircuit is forced to the levels stored in the signature map by a current supply (360) while the voltages across the power supply inputs of the unproven microcircuit are measured by a voltmeter (340). The measured power supply voltages for each power supply current value are then compared to the fixed voltage supply level used to test the known good microcircuit. The unproven microcircuit is faulted if any measured power supply voltage of the unproven microcircuit differs substantially from the fixed power supply voltage applied to the known good microcircuit.