The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 1997

Filed:

Aug. 21, 1995
Applicant:
Inventors:

Douglas H Weisman, Sunrise, FL (US);

Thomas J Swirbel, Davie, FL (US);

John K Arledge, Ft. Lauderdale, FL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B05D / ; C23C / ; C25D / ; H01L / ;
U.S. Cl.
CPC ...
216 13 ; 427124 ; 4271263 ; 427259 ; 427109 ; 20419232 ; 205122 ; 205221 ; 205222 ; 205223 ; 1566521 ; 216 23 ; 216 95 ; 216102 ; 216105 ; 359 88 ; 359 87 ; 437228 ; 437245 ; 437246 ; 437181 ;
Abstract

One method for fabricating solderable pads (406) onto a substrate (220) for direct chip attachment uses a multilayer metallization coating (500). The coating has a bottom layer (202) of indium-tin oxide, with an intermediate layer (204) of copper and a top layer (206) of indium-tin oxide. A masking layer (208) is deposited on the active display area (402) of the substrate, leaving the bonding pads uncovered. The revealed bonding pads are then plasma etched, using the polyimide as an etch resist, and the top layer of ITO is selectively removed to reveal the underlying copper layer. The exposed copper layer (204) is then plated with a solderable metal to the desired thickness to form bonding pads that may be used with direct chip attachment schemes.


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