Multiple protocol device interface subsystem and method

Abstract

A subsystem and method permits multiple protocols, to run simultaneously over a single adapter with minimal overhead. First interface structures are defined having similar component properties of a buffer address, buffer length, and cross-memory descriptor. The first structures are chainable, whereby data may be gathered from or scattered to multiple discontiguous data buffers for a single operation. A common structure completed by protocol heads has a pointer to the chain of first interface structures. For each control element, multiple buffer descriptors are provided to describe the various user buffers. The chain of multiple buffer structures contains pointers to the first structures employed to map buffers and obtain DMA addresses for an adapter. A layered architecture is provided for while allowing flexibility of utilizing current interfaces. Multiple protocols running over a single adapter driver are effected wherein the same protocol head code may run over a different adapter supporting the interface. Buffer, DMA management, and adapter handling are centralized in the adapter driver, allowing for more efficient allocation of system resources. The hardware interface is isolated in the adapter driver whereby changes for an integrated adapter may be isolated to one section of code.