The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 1996

Filed:

Nov. 20, 1995
Applicant:
Inventors:

Om P Agrawal, San Jose, CA (US);

Michael J Wright, Menlo Park, CA (US);

Ju Shen, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
364489 ; 34082583 ; 326 39 ;
Abstract

A programmable integrated circuit includes configurable logic blocks (CLB's), configurable input/output blocks (IOB's) and a configurable interconnect network for providing program-defined routing of signals between the CLB's and IOB's. Each CLB includes a lookup table having inputs and outputs, a first multiplexer means for applying a selected subset of CLB input signals to the lookup table inputs, and a second multiplexer means for routing lookup table output signals to selectable destinations. The first multiplexer means can programmably route input signals to the lookup table inputs from a variety of sources including first through fourth direct-connect receiving terminals distributed symmetrically about the CLB, first through fourth longline receiving terminals distributed symmetrically about the CLB, first through fourth general-interconnect receiving terminals distributed symmetrically about the CLB, and first through fourth feedback means distributed symmetrically within the CLB. The second multiplexer means can programmably route output signals from the lookup table to first through fourth output macrocells distributed symmetrically about the CLB. The first through fourth output macrocells can respectively couple the routed signals to first through fourth direct-connect outputting terminals distributed symmetrically about the CLB, first through fourth tristate outputting terminals distributed symmetrically about the CLB, and the first through fourth feedback means.


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