Silicon chip with an integrated magnetoresistive head mounted on a slider

Abstract

An MR head has its MR stripe protected from electro-static discharge (ESD) on a slider, such as titanium carbide. The MR stripe is protected by a plurality of silicon integrated circuit devices which conduct ESD-induced current from the MR stripe to a silicon chip substrate ground potential or to larger components in the MR head such as the first and second shield layers and the coil layer. In a preferred embodiment the integrated circuit devices and interconnects are constructed in a single crystal silicon chip. The silicon chip is fixedly mounted to a trailing edge of the slider and the MR head is mounted on a trailing edge of the silicon chip adjacent the integrated circuit devices. The invention includes a method of mass producing sliders by combining thin film technology for making MR heads with integrated circuit technology for making integrated circuit devices. These technologies are combined at the wafer level to ultimate completion of individual sliders. At the wafer level a silicon wafer, which contains the integrated circuit devices, is fixedly mounted to a wafer of slider material, such as titanium carbide. A plurality of rows and columns of MR heads are constructed on the silicon wafer adjacent the integrated circuit devices. The composite wafer is then diced into quadrants wherein each quadrant contains rows and columns of sliders with MR heads. Each quadrant is then diced into rows. Each row is then diced into individual sliders, each slider carrying an MR head which is ESD protected.