The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 1996

Filed:

Mar. 13, 1995
Applicant:
Inventors:

Masood Murtuza, Sugarland, TX (US);

Abbas I Attarwala, Mountain View, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ; H05K / ; H01R / ;
U.S. Cl.
CPC ...
361751 ; 174254 ; 361749 ; 361767 ; 361769 ; 361771 ; 361774 ; 361787 ; 361790 ; 361803 ; 29843 ;
Abstract

The ball grid array package (10) uses a flexible base (30) having a substantially flat center plate (34) disposed at a first level coupled to a substantially flat base plate (32) disposed at a second level. The center plate (34) is coupled to the base plate (32) by a plurality of flexible narrow straps (36-38) arranged substantially surrounding the center plate (34). The flexible base (30) accommodates the thermal expansion in the pedestal (18) caused by the powered up integrated circuit (16) so that the rest of the package does not expand and induce stress in the solder joint between the ball grid array (12) and the printed circuit board (14).


Find Patent Forward Citations

Murtuza, Masood. (1996). Low stress ball grid array package (U.S. Patent No. 5586010). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5586010

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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