The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 1996

Filed:

Aug. 25, 1994
Applicant:
Inventor:

Takeshi Onodera, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ; G11C / ;
U.S. Cl.
CPC ...
371 223 ; 371 211 ; 371 213 ;
Abstract

An object of the present invention is to provide an embedded testing circuit of a dual port memory capable of effectively testing the memory using a short test pattern while making simultaneous write/read from both of the ports. The testing circuit comprises an address inputting circuit selectively supplying M-sequence pattern data or their inverted pattern data to scan registers on the port A at the address input side and also selectively supplying pattern data in inverse relationship to the pattern data supplied to the port A to scan registers on the port B and a data inputting circuit selectively supplying the M-sequence pattern data or their inverted pattern data passed through the scan registers on the port A at the address input side to scan registers on the port A at the data input side and also selectively supplying the inverted pattern data or the M-sequence pattern data passed through the scan registers on the port B at the address input side to scan registers on the port B at the data input side.


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