The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 1996

Filed:

Sep. 28, 1995
Applicant:
Inventor:

Takashi Kiriyama, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ;
U.S. Cl.
CPC ...
370 17 ; 370 942 ; 370 79 ; 371 41 ;
Abstract

In a data transmission apparatus, a data coding section codes input data and outputs the coded data. A error correction execution determining section determines execution/non-execution of error-correcting coding on the basis of a congestion state and a bit error generation state in a network, and generates determination information. A frame formation section multiplexes the determination information with the coded data in units of frames, and generates frame data having a predetermined frame format. A error-correcting coding section executes error-correcting coding for the coded data in units of frames in accordance with the determination information contained in the frame data, and generates frame length information representing a frame length of a frame for which error-correcting coding is executed. When the determination information contained in the frame data represents non-execution of error-correcting coding, a variable delay circuit delays the frame data of the frame, for which error-correcting coding is not executed, by a frame length indicated by frame length information of an immediately preceding frame for which error-correcting coding is to be executed. A selector outputs data from the data coding section and the variable delay circuit in a time-serial manner.


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