The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 1996

Filed:

Jun. 28, 1994
Applicant:
Inventors:

Masato Onaya, Gunma-Ken, JP;

Tsutomu Ishikawa, Ota, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341110 ;
Abstract

An adder 22, a quantizer 20, and a variable integrator 24 execute A/D conversion and the result is stored in a memory 12. A time constant of the variable integrator at this time is controlled by a time constant controller 25. On the other hand, data from the memory is integrated by a variable integrator 28 to provide an analog signal. At this time, control data of the time constant controller 25 is transferred via a memory 32 to a time constant controller 33, which then uses the transferred control data to control the time constant of the variable integrator 28. When a mode is changed, switches 34 and 35 are turned off. Therefore, a signal with no input can be written into the memory 12 for initializing the memory 12.


Find Patent Forward Citations

Onaya, Masato. (1996). Delay circuit using a digital memory (U.S. Patent No. 5576709). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5576709

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…