The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 1996

Filed:

Jul. 08, 1994
Applicant:
Inventors:

Chuen-Der Lien, Mountain View, CA (US);

Kyle W Terrill, Sunnyvale, CA (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257515 ; 257588 ; 257592 ;
Abstract

An embodiment of the present invention is a process for semiconductor device having a silicon substrate. The process comprises positioning at least one field implant mask and field implanting a silicon substrate around a bipolar active region in a substrate such that boron atoms are blocked out of an active region, and only the field region surrounding said active area is implanted, said implanting such that a predetermined layout area of a semiconductor device does not need to be increased to compensate for a BV.sub.bso problem.


Find Patent Forward Citations

Lien, Chuen-Der. (1996). Walled-emitter transistor (U.S. Patent No. 5574305). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5574305

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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