The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 1996
Filed:
Sep. 05, 1995
N Deepak Swamy, Austin, TX (US);
Dell USA, L.P., Austin, TX (US);
Abstract
An embedded core laminate including a conductive reference plane interposed between two insulation layers, and further interposed between two conductive layers. The assembly is laminated using standard temperature and pressure laminating procedures. Holes for interconnect vias are preferably drilled into the reference plane before laminating. The resulting embedded core laminate has three conductive layers with relatively uniform separation, insuring improved impedance control on each PCB (printed circuit board). Since uniform separation is maintained from one PCB to another, multiple PCBs connected together using embedded core laminates according to the present invention allows minimum cross-talk and characteristic impedance variations from one PCB to the next. The material comprising the conductive layers are preferably chosen with a CTE to match that of semiconductor die to protect solder joints of mounted components from thermal stress, improving reliability of SMT devices and allowing direct chip attach methods to be implemented. Balanced PCBs having five, seven and other odd numbers of conductive layers are available using an embedded core laminate material according to the present invention.