Redundant synchronized clock controller

Abstract

A redundant clock signal generator which allows the use of differing quantities of oscillators, depending on the degree of reliability desired. Synchronizers accompany each oscillator, and phase detectors monitor the phase deviation between any two oscillators in which synchronization is desired. Multiple pairs of oscillators are synchronized to produce a group of simultaneously synchronized clock signals, which are all concurrently available. Selection circuitry selects a predetermined number of the synchronized clock signals at the request of the selection control circuitry. The selection control circuitry determines which of the synchronized clock signals are to be selected either automatically or through manual intervention. Automatic selection can be triggered upon notification to the selection control circuitry of an error condition. The redundant nature of the invention allows redundant circuit loads to be clocked simultaneously, while providing redundancy in the clock signals themselves by selecting a different synchronized clock signal upon the failure of the currently active synchronized clock signal.