The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 1996
Filed:
Sep. 08, 1995
R Paul Dixon, Carrollton, TX (US);
Thanos Mentzelopoulos, Plano, TX (US);
Smithills MultiMedia Systems, Inc., Plano, TX (US);
Abstract
A data processor memory system that combines in a single memory array, a plurality of first-in-first-out (FIFO) buffer memories and a dual-port random access read-write memory (RAM). The memory array is divided into one region for the FIFO buffers and another region for the RAM memory. The memory system reads and writes data to the RAM region independently of the FIFO buffer region. The system enables access to the RAM memory by signals addressed to address fields within the RAM region, and enables access to the FIFO buffer memories by signals addressed to address fields within the FIFO region. The system writes data to each of the FIFO buffer memories utilizing an associated write pointer, and increments each write pointer when data is written to its associated FIFO buffer memory. The system reads data from each of the FIFO buffer memories utilizing an associated read pointer, and increments the read pointer when data is read from its associated FIFO buffer memory. The write pointers and the read pointers roll-over to a first address in their associated FIFO buffers when each pointer reaches the top of addressable memory in its associated FIFO buffer memory.