High frequency differential vco with common biased clipper

Abstract

A VCO includes a ring oscillator formed by connecting a plurality of voltage controlled inverting delay cells together, a biasing circuit for providing a bias voltage to each of the voltage controlled inverting delay cells, and a source-follower transistor for providing a control voltage to the biasing circuit and voltage controlled inverting delay cells. Each of the voltage controlled inverting delay cells includes a first and a second plurality of transistors which define two outputs of the voltage controlled inverting delay cell, and a clipper transistor connected between the two outputs to short them together whenever a difference between a bias voltage provided to a gate of the clipper transistor by the biasing circuit and a voltage on either one of the two outputs exceeds a threshold voltage of the clipper transistor. The biasing circuit includes a third plurality of transistors which are matched with corresponding ones of the first and second pluralities of transistors and the clipper transistor such that the bias voltage generated by the biasing circuit automatically changes so as to be substantially equal to voltages corresponding to a HIGH logic state on the two outputs of each voltage controlled inverting delay cell as the control voltage provided to the biasing circuit and each of the voltage controlled inverting delay cells changes.