The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 1996
Filed:
Aug. 31, 1994
Monty M Denneau, Brewster, NY (US);
Donald G Grice, Kingston, NY (US);
Peter H Hochschild, New York, NY (US);
Craig B Stunkel, Bethel, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Connections between the node switch sets associated with processors in large scalable processor arrays, such as those of the butterfly variety, are arranged, like the 2-D mesh array, in rows and columns between the node switch sets. Additional sets of switches called pivot switch sets are used to accomplish this. They are added to the processors and the processor switch sets to form processor clusters. The clusters are each assigned a logical row and column location in an array. Each pivot switch set is connected to all node switch sets in the same assigned column location and to all node switch sets in the same assigned row location as the pivot set. Consequently, any two node switch sets are connected by way of a pivot set located at either (a) the intersection row of the first node set and the column of the second node set or at (b) the intersection of the column of the first node set and the row of the second node set.