The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 1996
Filed:
Sep. 06, 1994
David Chiang, Saratoga, CA (US);
Napoleon W Lee, Fremont, CA (US);
Thomas Y Ho, Milpitas, CA (US);
David A Harrison, Cupertino, CA (US);
Nicholas Kucharewski, Jr, Pleasanton, CA (US);
Jeffrey H Seltzer, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A programmable logic device having macrocells enables gate cascades between macrocells to occur with a faster signal transit time, while preserving the flip flop function of the cascaded macrocells by reallocating a redirectable flip flop reset product term to the flip flop input. All gate product terms are retained during cascading. The macrocell logic is optimized for fast signal transit with selectable flip flop clocking. Multiplex clocking and programming are done with fewer transistors in the signal path, further reducing signal transit time.