Processor circuit comprising a first processor, and system comprising

Abstract

Processor circuit having two communication paths suitable for modem applications is described. The card includes a receiving/transmitting (R/T) circuit and a first processor. The R/T circuit is coupled to a second processor, e.g., the processor of a personal computer. It is also coupled to a network via the first processor. Data to and from the network is routed by the first processor to the second processor via the R/T circuit. A dual access memory device is also used to couple the first and second processors together. Use of the dual access memory device simplifies error diagnosis and the passing of error information between the first and second processors. A new main program is placed in a RAM of the first processor without the need for an expensive emulator or use of an EEPROM through the use of the dual access memory device. By storing an auxiliary program, e.g., a bootstrap program, in a first section of the dual access memory device, beginning at a start address of the first processor, and by receiving a main program which originates from the second processor, via a second section of the dual access memory device, the main program can be stored in a memory linked to the first processor at a second address within the memory space of the first processor. By renumbering the second address so that the main program is located at the start address of the address space of the first processor, the first processor is loaded with the main program.