Hardware circuit for securing a computer against undesired write and/or

Abstract

A write protect device for a computer comprising a hardware circuit with a switch connected to an internally installed circuit card which has cable connections between data storage device drives and a drive controller cable, the circuit card intercepting control lines used for drive selection and control. The switch is connected to inputs of a latch circuit which, in one position of the switch, generates *READONLY and READONLY signals at outputs of the latch circuit and, in a second position, *DISABLE and DISABLE signals at other outputs. To enter a read only mode, the circuit card includes an inverter and a NAND gate in a *WRITE GATE line to the data storage device drives with one input of the NAND gate being connected to the *READONLY line from the latch circuit which will prevent any *WRITE GATE signal from reaching the data storage device drives when the *READONLY line is activated. A further inverter and a NAND gate intercepts a *DRIVE SEL line to the data storage device drives with the NAND gate having one input connected to the *DISABLE line from the latch circuit. When the *DISABLE line is activated to enter a disable mode, that NAND gate will prevent any *DRIVE SEL signal from reaching an associated data storage device drive. A number of internal optional links and NAND gates on the circuit card can create further selectable operational features.