The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 1996
Filed:
Jan. 25, 1995
Thomas J Kocis, Austin, TX (US);
Dell USA, L.P., Austin, TX (US);
Abstract
A DRAM circuit is disclosed with circuitry for disabling data output drivers to prevent bus contention during system power-up. The circuitry includes a counter for counting RAS (or CAS) signals, and for disabling the output data drivers until 7 RAS (or CAS) signals are counted. The output of the counter (called Keep Off) connects to each of the tri-state buffer output drivers, through an AND gate. Other inputs to the AND gate may include an output signal Pwrup from a voltage detection circuit, and other enable signals. The counter uses the RAS signals as a clock signal to three D flip-flops. The Pwrup signal also is used as a reset to each of the flip-flops. The Q output of the flip-flops are anded together, to produce a signal which is released when the count reaches 111.